#### Monte Carlo, Monaco: 11-14 December 2016

The Organizing Committee of the IEEE CASS Flagship ICECS 2016 has selected the following tutorials:

## Morning tutorials:

**Sunday, December 11, 9:00-12:30**

### **Tutorial 4: ** Energy harvesting and power management for self powered wearable and IoT

**Area:**Power & Energy CAS

**Authors:**Mohammed Ismail and Baker Mohammad Kustar, UAE

### **Tutorial 7: ** Design Automation for AMS Circuits with Asynchronous Control

**Area:**AMS Systems, Asynchronous Control

**Author:**Alex Yakovlev, Newcastle University, UK

## Afternoon tutorials:

**Sunday, December 11, 14:00-17:30**

### **Tutorial 6: ** Low-Dropout Regulator ICs - From the Ground Up

**Area:**Green & Power Electronics

**Author:**Gabriel Rincon-Mora, Georgia Institute of Technology, USA

### **Tutorial 3: **New Manual Symbolic Circuit Analysis Laws

**Area:**New Circuit Analysis Method

**Author:**Sotoudeh Hamedi-Hagh, San Jose State University, USA

### **Tutorial 3: **New Manual Symbolic Circuit Analysis Laws

**Area:**New Circuit Analysis Method

**Author:**Hamedi-Hagh S.

Circuit analysis is performed by solving systems of equations that are obtained from Kirchhoff’s Voltage and Current Laws (KVL and KCL). As the number of nodes in a circuit increases, applying KVL and/or KCL manually becomes tedious. New manual symbolic circuit analysis laws (SCAL) are presented in this tutorial. This new method does not depend on KVL and/or KCL nor any signal flow graph and does not generate a system of equations to solve a circuit.

A circuit can be analyzed in two directions of forward gain and reverse gain. Eleven signal gain transfer functions can be defined for each direction. The voltage gain and admittance transfer functions are fundamentals and can define all other signal gain transfer functions. SCAL explains simple laws to extract voltage gain, admittance and noise transfer functions of a circuit much faster and easier when compared with all existing circuit analysis methods.

SCAL consist of 4 laws. The first law is the Suspendance Law that calculates the numerator and denominator of the admittance transfer functions. It also calculates the denominator of the voltage gain transfer function. Suspendance of a circuit is obtained by shorting each of its admittances one by one and multiplying them by the remaining circuit suspendance. Any admittance that was shorted earlier will be replaced by zero in subsequent calculations. All resulting suspendance terms will be added to obtain the overall suspendance.
The second law is the Trajectance Law that utilizes the suspendance law and calculates the numerator of the voltage gain transfer functions. A trajectance consists of a signal path from input to output that is expressed in terms of circuit admittances. When a trajectance is set to zero, it disconnects input from output and creates a zero in voltage gain transfer function.

The third law is the Susceptance Switching Law that when combined with the first and the second laws can directly calculate any polynomial term of a voltage gain or an admittance transfer function and extract any high order pole or zero of an amplifier in a fraction of time without the need to perform a full analysis.
The last law is the Noise Transformation Law that calculates the two input and output current noises of a circuit from all internal noise sources and then transforms them to an equivalent votage or current noise at the input or output terminals by utilizing the forward and reverse voltage gains as well as the input and output admittances of the circuit which are obtained using suspendance and tranjectance laws. SCAL can be applied to any circuit for obtaining a variety of signal gain transfer functions. A single-stage amplifier, a cascode amplifier and a complex closed-loop opamp will be analyzed using SCAL during this tutorial for introducing this wonderful manual symbolic circuit analysis technique.

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### **Tutorial 4: ** Energy harvesting and power management for self powered wearable and IoT

**Area:**Power & Energy CAS

**Author:**Ismail M.

With the exponential growth in portable electronic and sensing devices in the last decade, it is clear that the vast majority of future electronic systems will be compact, portable devices with low power budgets. Energy harvesting solutions also have opportunities for a growing set of bio monitoring, ambient intelligence, security, automotive and many quality of life applications. The versatility and viability of high data rate wireless sensing and monitoring systems for remote and hard to reach spots, requires battery free operation to perform their sensing functions and wireless communication without any supervision, configuration, or maintenance. For this system to become a reality, there are key enabling innovations that need to be addressed and implemented. These innovations span the development of novel materials, passive and active device architecture; circuit design, and system level architecture and integration. Subsequently, these technologies will be used to enable a new class of self-powered adaptive high data rate systems. This talk will cover the opportunities and challenges to enable autonomous WSN for biomedical applications, focusing on energy harvesting and power management system. The tutorial will focus on the following topic:

- Introduction to Energy Harvesting
- Energy Harvesting sources Thermal gradient, Solar, Piezoelectric, electrostatic
- Interface circuits (DC/DC, AC/DC)
- Startup options
- Energy Transfer (induction, RF with piezoelectric)
- Self-Power System architecture (fail-safe concept, safe state, deterministic metric)
- Power management for energy harvesting system (power delivery tree, power conversion, interface with SOC, power state and interface with Operating system)
- Demo of self-power SOC using TEG harvester.

### **Tutorial 6: ** Low-Dropout Regulator ICs - From the Ground Up

**Area:**Green & Power Electronics

**Author:**Rincon-Mora G.

In the advent of functionally dense integrated circuits (ICs), linear lowdropout (LDO) regulators emerge as critical, if not vital, microelectronic components. They isolate and filter noisy switching power supplies from increasingly sensitive mixed-signal circuits, protecting phase-locked loops (PLLs), data converters, voltage controlled oscillators (VCOs), and the like from power-supply noise, coupled noise, load variations, and widely variant battery voltages, and all this while regulating its output, supplying the load, and consuming little power. The aim of this talk is to show how to design these LDO ICs. For this, the presentation first describes generalities, regions of operation, applications, and circuit composition. With this background, the material then discusses and explains feedback stability and compensation. IC design is next with power transistors, buffers, and error amplifier implementations. The presentation ends with output-compensated, Miller-compensated, gate-coupled, and self referenced design examples.

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### **Tutorial 7: ** Design Automation for AMS Circuits with Asynchronous Control

**Area:**AMS Systems, Asynchronous Control

**Author:**Yakovlev A.

AMS engineers are increasingly involved in designing AMS electronics with a significant portion of digital elements in them. Examples include programmable and pipelined ADCs, complex power management circuits such as multi-phase buck converters, switched-capacitor circuits, etc. Specific reasons for having more digital components are the increasing complexity and functionality of AMS, as well as the migration of mixed signal towards ultra-deep sub-micron technologies. According to Andrew Talbot from Intel, recently speaking at the AMS workshop at RAL, “transistors are very fast switches, netlists are huge, parasitics are phenomenally difficult to estimate, passives don’t follow Moore’s law, reliability is a brand new landscape.”. Digital parts in them often perform functions such as calibration control, parameter configuration, switching control, “monitoring and knobbing”, etc. We call such digital (on-top or within analogue) electronics “little digital” as opposed to “big digital” (i.e. traditional computational) electronics. Designing “little digital” is hard because it should seamlessly integrate with the analog parts, which are dynamic and notoriously hard to automate. Using standard design flows such as RTL, which is driven by a clock, is not a good option for “little digital” because analog circuits have their own notion of timing and events. The clocked operation mode, natural for the data processing (in “big digital”), might lead to either low responsiveness or power consumption overheads in control modules of mixed-signal systems. On the one hand, the operating frequency must be sufficiently high to promptly react to changes in analogue sensor readings. On the other hand, high clocking frequency can potentially result in wasted clock cycles if the sensors’ readings change slowly. Asynchronous circuits can provide greater robustness, reactivity, and power efficiency. However, due to the lack of knowledge of the methods and awareness and trust in the available (mostly academic) CAD tools for asynchronous design, the majority of AMS engineers have to rely on ad hoc development approaches and use extensive simulation to prove correctness of their designs.

We will introduce a new and steadily evolving design flow for AMS systems with asynchronous control, developed at Newcastle University in collaboration with the University of Utah. The flow is based on the use of event-based models such as Petri nets and Signal Transition Graphs (STGs), and implemented in a tool-suite called Workcraft. Workcraft is publicly available from http://workcraft.org/ and has an increasing number of users, both academic and industrial. This flow has already been used at Dialog Semiconductor with success. The tutorial will consist of two parts. In the first part we will concentrate on the use of existing Workcraft tools for designing asynchronous controllers – we will show how the new design flow can be applied to designing asynchronous control for multi-phase buck converters, ADCs, interfaces, SRAM controllers, etc. In the second part of the tutorial, we will present the most recent theoretical and algorithmic developments targeted at the design optimization of the holistic AMS systems involving formal verification of their analog parts. The method involves co-simulation of analog and digital parts, extraction of traces and construction of Petri net models from simulation traces; these models are then used for AMS verification and optimization of the digital asynchronous parts.

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